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Communication dans un congrès

High Level Modeling and Hardware Implementation of Image Processing Algorithms Using XSG

Abstract : Design of Systems-on-Chip has become very common especially with the remarkable advances in the field of high-level system modeling. In recent years, Matlab also offers a Simulink interface for the design of hardware systems. From a high-level specification, Matlab provides self-generation of HDL codes and/or FPGA configuration codes while providing other benefits of easy simulation. In addition, a large part of the Systems-on-Chip use at least one image processing algorithm and at the same time border detection is one of the most used algorithms. This paper presents a study and a hardware implementation of various algorithms of borders detection realized under Xilinx System-Generator. The various algorithms are implemented using Xilinx FPGA device, the simulation and synthesis results are also compared. We use the Xilinx Zed-Board for physical implementations in-the-loop.
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Communication dans un congrès
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https://hal-univ-bourgogne.archives-ouvertes.fr/hal-02458172
Contributeur : Imvia - Université de Bourgogne <>
Soumis le : mardi 28 janvier 2020 - 15:18:50
Dernière modification le : mardi 28 janvier 2020 - 15:19:41

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  • HAL Id : hal-02458172, version 1

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Kamel Messaoudi, Doghmane, Hakim, Houcine Bourouba, El-Bay Bourennane, Salah Toumi. High Level Modeling and Hardware Implementation of Image Processing Algorithms Using XSG. 4th International Conference On Electrical Engineering and Control Applications, ICEECA 2019, Dec 2019, Constantine, Algeria. ⟨hal-02458172⟩

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